Κωδικός: ATTINY 2313

ATTINY2313-20PU 8-BIT MICROCONTROLLER 20MHz 18I/O DIP-20

ATTINY2313-20PU Microcontroller MCU ATMEL 8-bit 2kB flash Eeprom 18Ι/Ο DIP-20

FEATURES

· Utilizes the AVR^® RISC Architecture

· AVR – High-performance and Low-power RISC Architecture

– 120 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 20 MIPS Throughput at 20 MHz

· Data and Non-volatile Program and Data Memories

– 2K Bytes of In-System Self Programmable Flash

Endurance 10,000 Write/Erase Cycles

– 128 Bytes In-System Programmable EEPROM

Endurance: 100,000 Write/Erase Cycles

– 128 Bytes Internal SRAM

– Programming Lock for Flash Program and EEPROM Data Security

· Peripheral Features

– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes

– Four PWM Channels

– On-chip Analog Comparator

– Programmable Watchdog Timer with On-chip Oscillator

– USI – Universal Serial Interface

– Full Duplex USART

· Special Microcontroller Features

– debugWIRE On-chip Debugging

– In-System Programmable via SPI Port

– External and Internal Interrupt Sources

– Low-power Idle, Power-down, and Standby Modes

– Enhanced Power-on Reset Circuit

– Programmable Brown-out Detection Circuit

– Internal Calibrated Oscillator

· I/O and Packages

– 18 Programmable I/O Lines

– 20-pin PDIP, 20-pin SOIC, 20-pad QFN/MLF

· Operating Voltages

– 1.8 – 5.5V (ATtiny2313V)

– 2.7 – 5.5V (ATtiny2313)

· Speed Grades

– ATtiny2313V: 0 – 4 MHz @ 1.8

- 5.5V, 0 – 10 MHz @ 2.7 – 5.5V

– ATtiny2313: 0 – 10 MHz @ 2.7 - 5.5V, 0 – 20 MHz @ 4.5 – 5.5V

· Typical Power Consumption

– Active Mode

MHz, 1.8V: 230 μA

32    Hz, 1.8V: 20 μA (including oscillator)

– Power-down Mode

< 0.1 μA @ 1.8V

 

 OVERVIEW

The ATtiny2313 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny2313 achieves through puts approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

 

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